DDR5 SDRAM

DDR5 SDRAM
Double Data Rate 5 Synchronous Dynamic Random-Access Memory
Type of RAM
16 GB[1] DDR5-4800 1.1 V UDIMM
DeveloperJEDEC
TypeSynchronous dynamic random-access memory
Generation5th generation
Release dateJuly 14, 2020 (2020-07-14)[2]
Standards
  • DDR5-4000 (PC5-32000)
  • DDR5-4400 (PC5-35200)
  • DDR5-4800 (PC5-38400)
  • DDR5-5200 (PC5-41600)
  • DDR5-5600 (PC5-44800)
  • DDR5-6000 (PC5-48000)
  • DDR5-6200 (PC5-49600)
  • DDR5-6400 (PC5-51200)
  • DDR5-6800 (PC5-54400)
  • DDR5-7200 (PC5-57600)
  • DDR5-7600 (PC5-60800)
  • DDR5-8000 (PC5-64000)
  • DDR5-8400 (PC5-67200)
  • DDR5-8800 (PC5-70400)
[3][4]
Clock rate2,000–4,400 MHz
Cycle time16n bank structure
Prefetch buffer4n
Transfer rate4–8.8GT/s
Bandwidth32–64 GB/s[a]
Voltage1.1 V nominal (actual levels are regulated by on-the-module regulators)
PredecessorDDR4 SDRAM (2014)
SuccessorDDR6 SDRAM

Double Data Rate 5 Synchronous Dynamic Random-Access Memory (DDR5 SDRAM) is a type of synchronous dynamic random-access memory. Compared to its predecessor DDR4 SDRAM, DDR5 was planned to reduce power consumption, while doubling bandwidth.[5] The standard, originally targeted for 2018,[6] was released on July 14, 2020.[2]

A new feature called Decision Feedback Equalization (DFE) enables input/output (I/O) speed scalability for higher bandwidth and performance improvement. DDR5 has about the same latency (around 14 ns) as DDR4 and DDR3.[7] DDR5 octuples the maximum DIMM capacity from 64 GB to 512 GB.[8][3] DDR5 also has higher frequencies than DDR4, up to 8GT/s which translates into 64 GB/s (8 gigatransfers/second * 64-bit width / 8 bits/byte = 64 GB/s) of bandwidth per DIMM.

Rambus announced a working DDR5 dual in-line memory module (DIMM) in September 2017.[9][10] On November 15, 2018, SK Hynix announced completion of its first DDR5 RAM chip; running at 5.2 GT/s at 1.1 V.[11] In February 2019, SK Hynix announced a 6.4 GT/s chip, the highest speed specified by the preliminary DDR5 standard.[12] The first production DDR5 DRAM chip was officially launched by SK Hynix on October 6, 2020.[13][14]

The separate JEDEC standard Low Power Double Data Rate 5 (LPDDR5), intended for laptops and smartphones, was released in February 2019.[15]

Compared to DDR4, DDR5 further reduces memory voltage to 1.1 V, thus reducing power consumption. DDR5 modules incorporate on-board voltage regulators in order to reach higher speeds.[10]

  1. ^ Here, K, M, G, or T refer to the binary prefixes based on powers of 1024.
  2. ^ a b Smith, Ryan (July 14, 2020). "DDR5 Memory Specification Released: Setting the Stage for DDR5-6400 And Beyond". AnandTech. Retrieved July 15, 2020.
  3. ^ a b "DDR5 Memory Standard: An introduction to the next generation of DRAM module technology - Kingston Technology". Kingston Technology. Retrieved February 19, 2023.
  4. ^ "DDR5 SDRAM Product Core Data Sheet" (PDF). Micron. Retrieved May 15, 2023.[dead link]
  5. ^ Manion, Wayne (March 31, 2017). "DDR5 will boost bandwidth and lower power consumption". Tech Report. Retrieved April 1, 2017.
  6. ^ Cunningham, Andrew (March 31, 2017). "Next-generation DDR5 RAM will double the speed of DDR4 in 2018". Ars Technica. Retrieved January 15, 2018.
  7. ^ Dr. Ian Cutress. "Insights into DDR5 Sub-timings and Latencies". AnandTech.
  8. ^ "DDR5 vs DDR4 – All the Design Challenges & Advantages".
  9. ^ Lilly, Paul (September 22, 2017). "DDR5 memory is twice as fast as DDR4 and slated for 2019". PC Gamer. Retrieved January 15, 2018.
  10. ^ a b Tyson, Mark (September 22, 2017). "Rambus announces industry's first fully functional DDR5 DIMM - RAM - News". hexus.net.
  11. ^ Malakar, Abhishek (November 18, 2018). "SK Hynix Develops First 16 Gb DDR5-5200 Memory Chip". Archived from the original on March 31, 2019. Retrieved November 18, 2018.
  12. ^ Shilov, Anton. "SK Hynix Details DDR5-6400". anandtech.com.
  13. ^ "SK hynix Launches World's First DDR5 DRAM". hpcwire.com.
  14. ^ "SK hynix: DDR5 DRAM Launches". businesskorea.co.kr. October 7, 2020.
  15. ^ "JEDEC Updates Standard for Low Power Memory Devices: LPDDR5" (Press release). JEDEC. February 19, 2019.


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