In computer science, instruction selection is the stage of a compiler backend that transforms its middle-level intermediate representation (IR) into a low-level IR. In a typical compiler, instruction selection precedes both instruction scheduling and register allocation; hence its output IR has an infinite set of pseudo-registers (often known as temporaries) and may still be – and typically is – subject to peephole optimization. Otherwise, it closely resembles the target machine code, bytecode, or assembly language.
For example, for the following sequence of middle-level IR code
t1 = a t2 = b t3 = t1 + t2 a = t3 b = t1
a good instruction sequence for the x86 architecture is
MOV EAX, a
XCHG EAX, b
ADD a, EAX
For a comprehensive survey on instruction selection, see. [1] [2]
- ^ Blindell, Gabriel S. Hjort (2013). Survey on Instruction Selection: An Extensive and Modern Literature Review (Report). arXiv:1306.4898. ISBN 978-91-7501-898-0.
- ^ Blindell, Gabriel S. Hjort (2016). Instruction Selection: Principles, Methods, & Applications. Springer. doi:10.1007/978-3-319-34019-7. ISBN 978-3-319-34017-3. S2CID 13390131.