MIPI M-PHY | |
Year created | 2011 |
---|---|
Created by | MIPI Alliance |
Supersedes | D-PHY |
Width in bits | 1–4 lanes, w/adaptive discovery (depending on higher-level protocol) |
Speed | up to 11.6 Gbit/s per data lane |
Style | serial, embedded clock |
External interface | yes, with optical media converter |
Website | https://mipi.org/specifications/m-phy |
M-PHY is a high speed data communications physical layer protocol standard developed by the MIPI Alliance, PHY Working group, and targeted at the needs of mobile multimedia devices.[1] The specification's details are proprietary to MIPI member organizations, but a substantial body of knowledge can be assembled from open sources. A number of industry standard settings bodies have incorporated M-PHY into their specifications including Mobile PCI Express,[2][3][4][5][6][7][8] Universal Flash Storage,[9][10][11] and as the physical layer for SuperSpeed InterChip USB.[12][13][14][15][16][17]
To support high speed, M-PHY is generally transmitted using differential signaling over impedance controlled traces between components. When use on a single circuit card, the use of electrical termination may be optional. Options to extend its range could include operation over a short flexible flat cable, and M-PHY was designed to support optical media converters allowing extended distance between transmitters and receivers, and reducing concerns with electromagnetic interference.[15]