VIA PadLock

VIA PadLock is a central processing unit (CPU) instruction set extension to the x86 microprocessor instruction set architecture (ISA) found on processors produced by VIA Technologies and Zhaoxin. Introduced in 2003 with the VIA Centaur CPUs, the additional instructions provide hardware-accelerated random number generation (RNG), Advanced Encryption Standard (AES), SHA-1, SHA256, and Montgomery modular multiplication.[1][2]

  1. ^ "VIA PadLock Programming Guide". August 4, 2005. Archived from the original on May 26, 2010.
  2. ^ "VIA PadLock - Wicked Fast Encryption". www.logix.cz.

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